Design of nearly body-effect free Si/SiGe MODFETs

DC transfer characteristic measurements have been carried out on one n-channel Si/SiGe MODFETs with a MOS gate at three different substrate biases. For our layer structure, electrons are supplied into the strained Si quantum well (QW) from the top heavily doped layer and below the QW is non-intentionally doped (setback). Here, we numerically studied the setback layer, for which the doping can be systematically designed to reduce the influence of the substrate bias on the threshold voltage (VTH) shift. By inserting and positioning a layer of 15 nm-thick heavily doped n (2.10 cm) into the 700nm-thick setback layer, we found that, when we positioned the n layer 635 nm below the QW, the VTH shifted by only 37 mV and only a slight change of the subthreshold slope occurred, 3.12 mV/dec, for -2 V applied to the substrate